- Test Solution Development, Test Platform Conversion
- Silicon Photonics Test Lab
- Customized Tester Design
- HTOL Test
- RF System Level Test
- Device Characterization and Low Yield Analysis
- Optimize Test Time
- Optimize Socket pins clean recipe
- Contact Force management
- Part Average Test(PAT)
- Support GDBN(Good Die in Bad Neighborhood), Outlier
- Optimize Probe Card Clean Recipe
- Probe Card Design
- Loadboard Design
- Handler Change Kit Design