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Wafer Test
Package Test
Custom Test Solution
Wafer Test
An increase in the IC with higher complexity and speed, particularly in wireless, makes the lower yields and the higher package costs, creating a need for RF sorting before packaging to save package scrap. Rising integration level and package inductance requirements will imply chip-scale packages (CSPs), flip-chip assembly with known-good die (KGD) and/or expensive multi-chip modules(MCM's) for high-value chips. As a result, the requirement for wafer sorting in production is the market demand.
 
Wafer Test Service :
‧Prototype characterization
‧DC/RF Functional test
‧Test program development and conversion
‧Membrane probe card design and correlation
‧Inking/inkless file
‧Baking
‧Packing
‧Drop shipment
Customer Service :
‧WIP Report
‧Yield Analysis
‧Cycle Time Report
‧Periodically Test data Transfer
‧Test Time Optimization